FastSlim: Prefetch-Safe Trace Reduction for I/O Cache Simulation

Simulation is an indispensable tool for evaluating I/O systems, complementing benchmarking and analytical modeling. This paper presents a new algorithm, called FastSlim, to reduce the size of I/O traces. FastSlim improves performance of trace-driven simulation of I/O caching systems without compromising simulation accuracy. FastSlim is more general than existing trace reduction schemes in two ways. First, it is prefetch-safe, i.e., traces reduced by FastSlim yield provably exact simulations of I/O systems with prefetching, a key technique for improving I/O performance. Second, it is compatible with a wide range of cache replacement policies, including widely used practical approximations to lru. FastSlim-reduced traces are safe for simulations of storage hierarchies and systems with parallel disks. This paper gives a formal treatment of prefetching and replacement issues for trace reduction, introduces the FastSlim algorithm, proves that FastSlim and variants are safe for a broad range of I/O caching and prefetching systems, and presents experimental results from applying FastSlim to a representative set of virtual out-of-core (VOOC) applications. The results show that FastSlim reduces trace volume by factors of 10 2 to 10 3 for the applications studied. 1 1. INTRODUCTION A key challenge for high-performance computer systems is to bridge the widening gap in bandwidths and access times between internal memory and external storage. One approach to attacking the I/O bottleneck is through software innovations to manage the memory/storage hierarchy more eeectively. Research in this direction has given rise to two important trends. First, many systems extend the storage hierarchy to incorporate parallel disks Patterson et al. 1988], tertiary storage, and multiple levels of DRAM-based I/O cache, e.g., network memory Feeley et al. 1995]. Second, many systems employ new techniques to proactively manage movement and placement of data in the storage hierarchy. In particular, prefetching is now a part of every advanced I/O system, and recent research has yielded a family of integrated prefetching and caching schemes Cao et al. 1995; Kimbrel et al. 1996; Patterson et al. 1995]. The most exible and powerful tool for evaluating new I/O structures is simulation, which handles varying assumptions about the workload and the hardware. Unfortunately, high overhead compromises the usefulness of simulation. While execution-driven simulation eliminates the need to store and process large trace les, it leads to unacceptably high processing costs for evaluating I/O systems. On the other hand, trace les for trace-driven simulation may be very large, leading to excessive costs to store …